a. Field of Invention
This invention pertains to a method for increasing the speed of a device used for encrypting and decrypting data using the DATA ENCRYPTION STANDARD (DES) in the cipher feedback mode. b. Description of the Prior Art
The Data Encryption Standard is promulgated by the National Burear of Standards as defined in FIPS publication PUB46, dated Jan. 15, 1977. All the approved modes of operation of the DES are based on a basic electronic code book (ECB) algorithm with a block cipher (64 bits in, 64 bits out) consisting of sixteen iterations of a kernel enciphering function which is fairly complex in itself. The highest performance hardware implementation of the algorithm currently available requires at least one clock cycle per iteration and ten additional clock cycles for input and output of each block. This limits the maximum bit rate using 1-bit cipher feedback to approximately 112 KBPS using this device. The conventional techniques used to increase processing speed, namely pipelining or parallel processing cannot be used with the standard cipher feedback mode. Pipelining cannot be used since the results of one iteration of the encryption process must be available before the next iteration can begin. Straightforward parallel processing cannot be used since the data input and output are in the form of a serial bit stream and the results of encryption of one group of k bits are needed before encryption of the next group can begin.